
If Card and Socket Services has set the SIGCHG bit in the PCI Configuration
Status Register to a logic 1, the RING signal is routed to the STSCHG line on the PCI
bus. The signal is inverted by the RS-232 receiver, so a positive voltage on pin 22 will
assert STSCHG.
Table 17 shows the pin configuration of the MPAC-100 DTE connector. The
definitions of the interchange circuits according to the RS-232-D standard can be found
starting on page 52.
* Not included in the official RS-232-D specification
Comm. Reg. bit 7TMTEST MODEX25
PCI STSCHG signalCERINGX22
N/C19
N/C16
N/C13
SYNCA pin*SYNCAX10
ABDGND7
RTSA pinCARTSX4
CGND1
SCC Pin or Register Bit
Circuit
Signal
DTE
DTE
Pin
Table 17 --- Connector Pin Definitions
Quatech MPAC-100 User's Manual
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